The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2011

Filed:

Feb. 19, 2009
Applicants:

Kosuke Tatsumura, Kawasaki, JP;

Masakazu Goto, Yokohama, JP;

Reika Ichihara, Yokohama, JP;

Masato Koyama, Miura-gun, JP;

Shigeru Kawanaka, Yokohama, JP;

Kazuaki Nakajima, Tokyo, JP;

Inventors:

Kosuke Tatsumura, Kawasaki, JP;

Masakazu Goto, Yokohama, JP;

Reika Ichihara, Yokohama, JP;

Masato Koyama, Miura-gun, JP;

Shigeru Kawanaka, Yokohama, JP;

Kazuaki Nakajima, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/70 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device includes a semiconductor substrate, a p-channel MIS transistor formed on the substrate, the p-channel transistor having a first gate dielectric formed on the substrate and a first gate electrode layer formed on the first dielectric, and an n-channel MIS transistor formed on the substrate, the n-channel transistor having a second gate dielectric formed on the substrate and a second gate electrode layer formed on the second dielectric. A bottom layer of the first gate electrode layer in contact with the first gate dielectric and a bottom layer of the second gate electrode layer in contact with the second gate dielectric have the same orientation and the same composition including Ta and C, and a mole ratio of Ta to a total of C and Ta, (Ta/(Ta+C)), is larger than 0.5.


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