The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 2011

Filed:

Nov. 24, 2004
Applicants:

Sean J. Treichler, Mountain View, CA (US);

Brad W. Simeral, San Francisco, CA (US);

Roman Surgutchick, Santa Clara, CA (US);

Anand Srinivasan, San Jose, CA (US);

Dmitry Vyshetsky, Cupertino, CA (US);

Inventors:

Sean J. Treichler, Mountain View, CA (US);

Brad W. Simeral, San Francisco, CA (US);

Roman Surgutchick, Santa Clara, CA (US);

Anand Srinivasan, San Jose, CA (US);

Dmitry Vyshetsky, Cupertino, CA (US);

Assignee:

Nvidia Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/36 (2006.01); G06F 3/00 (2006.01); G06F 13/12 (2006.01); G06F 5/00 (2006.01); G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system controller includes a memory controller and a host interface residing in different clock domains. There is a time delay between the time when the memory controller issues a read command to a memory and the data becoming present and available at the host interface. The memory controller generates an alarm message at or near the time that it issues the read command. The alarm message indicates to the host interface the time that the data is available for transfer to a host.


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