The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 2011

Filed:

Dec. 10, 2008
Applicants:

Neil Wood, Centreville, CA (US);

David Rea, Manassas, VA (US);

Bin LI, Chantilly, VA (US);

Inventors:

Neil Wood, Centreville, CA (US);

David Rea, Manassas, VA (US);

Bin Li, Chantilly, VA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/003 (2006.01); H03K 19/096 (2006.01); H03L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A current mode logic voter circuit includes three two-input split NOR gates. Each two-input split NOR gate receives a corresponding pair of input signals and generates a pair of first output signals responsive to the input signals. A three input split NOR gate is coupled to the two-input split NOR gates to receive the first output signals and generates a second pair of output signals responsive to the first output signals from the two-input split NOR gates. The two and three-input split NOR gates can be formed from current mode logic buffer circuits, and in one embodiment in the three-input split NOR gate the buffer circuits are hardened.


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