The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 2011

Filed:

Nov. 12, 2007
Applicants:

Kenichi Shirasaka, Hamamatsu, JP;

Hirotaka Eguchi, Aira-gun, JP;

Inventors:

Kenichi Shirasaka, Hamamatsu, JP;

Hirotaka Eguchi, Aira-gun, JP;

Assignee:

Yamaha Corporation, Shizuoka-ken, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
Abstract

A lead frame has a die stage for mounting a semiconductor chip whose electrodes are electrically connected with leads via bonding wires, wherein they are enclosed in a molded resin, thus producing a semiconductor device. The outline of the die stage is shaped so as to be smaller than the outline of the semiconductor chip, and a plurality of cutouts are formed in the peripheral portion of the die stage so as to reduce the overall area of the die stage and to enhance the adhesion between the die stage and molded resin. The length Lof each cutout ranges from (L×0.05) to (L×0.20) where Ldenotes the length of each side of the die stage, and the overall area Sof the die stage ranges from (S×0.10) to (S×0.40) where Sdenotes the overall area of the semiconductor chip.


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