The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2011

Filed:

Dec. 13, 2006
Applicants:

Joseph S. Elder, Orlando, FL (US);

Joseph T. Yestrebsky, Apopka, FL (US);

Mohammed D. Islam, Winter Park, FL (US);

Inventors:

Joseph S. Elder, Orlando, FL (US);

Joseph T. Yestrebsky, Apopka, FL (US);

Mohammed D. Islam, Winter Park, FL (US);

Assignee:

Micrel, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

A single chip receiver is disclosed herein. The chip only requires an external antenna for operation. A decoder is formed on chip for performing logical operations on demodulated digital data. A baseband filter is controlled by external control signals to have one of a plurality of discrete frequency response bandwidths depending on the type of signal to be received. To compensate for process variations in the implementation of the IC, bias currents setting the operating conditions for various amplifiers and other components in the system are adjusted based on frequency control signals in a PLL circuit in the local oscillator. Since the magnitude of the control signal reflects the process variations, the bias currents are adjusted based on the control signal to offset these variations in other portions of the receiver. To further improve the signal to noise ratio of the receiver, the IF filter is tuned within a range so as not to include any integer multiple or integer divisor of the timing reference frequency. Various techniques are described for enabling a complete receiver to be implemented on a single chip which receives an antenna input signal and outputs a digital data signal.


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