The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2011
Filed:
Oct. 12, 2007
Takumi Mikawa, Shiga, JP;
Takeshi Takagi, Kyoto, JP;
Yoshio Kawashima, Osaka, JP;
Koji Arita, Osaka, JP;
Takumi Mikawa, Shiga, JP;
Takeshi Takagi, Kyoto, JP;
Yoshio Kawashima, Osaka, JP;
Koji Arita, Osaka, JP;
Panasonic Corporation, Osaka, JP;
Abstract
A lower electrode () is provided on a semiconductor chip substrate (). A lower electrode () is covered with a first interlayer insulating layer () from above. A first contact hole () is provided on the lower electrode () to penetrate through the first interlayer insulating layer (). A low-resistance layer () forming the resistance variable layer () is embedded to fill the first contact hole (). A high-resistance layer () is provided on the first interlayer insulating layer () and the low-resistance layer (). The resistance variable layer () is formed by a multi-layer resistance layer including a single layer of the high-resistance layer () and a single layer of the low-resistance layer (). The low-resistance layer () forming the memory portion () is isolated from at least its adjacent memory portion ().