The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2011
Filed:
Mar. 06, 2009
Pak K. Leung, Cedar Park, TX (US);
Terry G. Sparks, Niskayuna, NY (US);
David V. Horak, Essex Junction, VT (US);
Stephen M. Gates, Ossining, NY (US);
Pak K. Leung, Cedar Park, TX (US);
Terry G. Sparks, Niskayuna, NY (US);
David V. Horak, Essex Junction, VT (US);
Stephen M. Gates, Ossining, NY (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method and apparatus are described for fabricating an ultra low-k interconnect structure by depositing and curing a first via layer () of ultra low dielectric constant (ULK) material, depositing a second uncured trench layer () of the same ULK material, selectively etching a via opening () and trench opening () with a dual damascene etch process which uses a trench etch end point signal from the chemical differences between uncured trench layer () and the underlying cured via layer (), and then curing the second trench layer () before forming an interconnect structure () by filling the trench opening () and via opening () with an interconnection material so that there is no additional interface or higher dielectric constant material left behind.