The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2011

Filed:

Oct. 18, 2007
Applicants:

Junedong Lee, Hopewell Junction, NY (US);

Dominic J. Schepis, Wappingers Falls, NY (US);

Jeffrey W. Sleight, Ridgefield, CT (US);

Zhibin Ren, Hopewell Junction, NY (US);

Inventors:

Junedong Lee, Hopewell Junction, NY (US);

Dominic J. Schepis, Wappingers Falls, NY (US);

Jeffrey W. Sleight, Ridgefield, CT (US);

Zhibin Ren, Hopewell Junction, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/46 (2006.01);
U.S. Cl.
CPC ...
Abstract

A diffusion barrier layer is incorporated between a top semiconductor layer and buried oxide layer. The diffusion barrier layer blocks diffusion of dopants into or out of buried oxide layer. The diffusion barrier layer may comprise a dielectric material such as silicon oxynitride or a high-k gate dielectric material. Alternately, the diffusion barrier layer may comprise a semiconductor material such as SiC. Such materials provide less charge trapping than a silicon nitride layer, which causes a high level of interface trap density and charge in the buried oxide layer. Thus, diffusion of dopants from and into semiconductor devices through the buried oxide layer is suppressed by the diffusion barrier layer without inducing a high interface trap density or charge in the buried oxide layer.


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