The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 2011

Filed:

Jul. 03, 2007
Applicants:

Michiel J. Van Duuren, Valkenswaard, NL;

Robertus T. F. Van Schaijk, Eindhoven, NL;

Inventors:

Michiel J. Van Duuren, Valkenswaard, NL;

Robertus T. F. Van Schaijk, Eindhoven, NL;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

Consistent with an example embodiment, a non-volatile memory cell on a semiconductor substrate includes a first and a second transistor. Each transistor is arranged a s a memory element that includes two diffusion regions capable of either acting as a source or drain, a charge storage element and a control gate element. A channel region is located intermediate the two diffusion regions. The charge storage element is located over the channel region and the control gate element is arranged on top of the charge storage element. One diffusion region of the first transistor and one diffusion region of the second transistor form a common diffusion region. The other diffusion region of the first transistor is connected as first diffusion region to a first bit line, the other diffusion region of the second transistor is connected as second diffusion region to a second bit line and the common diffusion region is connected to a sensing line.


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