The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 2011

Filed:

Mar. 01, 2010
Applicants:

Katsunori Azuma, Hitachi, JP;

Mutsuhiro Mori, Mito, JP;

Kinya Nakatsu, Hitachinaka, JP;

Inventors:

Katsunori Azuma, Hitachi, JP;

Mutsuhiro Mori, Mito, JP;

Kinya Nakatsu, Hitachinaka, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 7/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a highly reliable electric power converter reduced in parasitic inductance. An electric power converter that includes a capacitor module which has a DC terminal, an inverter which coverts a direct current into an alternating current, and heat release fins which cool the inverter, is constructed so that: the inverter has a power module including a plurality of power semiconductor elements; the power module further has a metallic base, a dielectric substrate provided on one face of the metallic base, a power semiconductor element fixed to the dielectric substrate, and a DC terminal; the metallic base has the heat release fins on the other face; the DC terminal in the power module and the DC terminal in the capacitor module are each formed by stacking flat plate conductors via an insulator; the two positive and negative DC terminals have respective front ends bent in opposite directions; a plane including the bent sections is used as a surface for connecting the power module and the capacitor module; and the insulators overlap each other at the connection surface.


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