The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 2011

Filed:

Feb. 11, 2009
Applicant:

Bharath Raghavan, Irvine, CA (US);

Inventor:

Bharath Raghavan, Irvine, CA (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to one general aspect, an output driver configured to drive output signals from a core device may include a voltage convertor, an output stage, and a biasing unit. In various embodiments, the output driver is configured to operate in either a core device voltage mode or a high voltage mode. In some embodiments, the voltage convertor may be configured to receive a pair of differential input signals from a core device, wherein a maximum voltage of the input signals is equivalent to a core device voltage, and convert the input signals to a pair of intermediate input signals. In one embodiment, when in high voltage mode, the maximum voltage of the intermediate input signals may be equivalent to a high voltage that is higher than the core device voltage. In some embodiments, the output stage configured to receive the intermediate input signals, and produce a pair of differential output signals having a maximum voltage of, based upon the operating mode of the output driver, either the core device voltage or the high voltage. In various embodiments, the biasing unit configured to provide a biasing current to the output stage, wherein the biasing current is configured to produce a desired common mode voltage within the output stage.


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