The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 24, 2011
Filed:
Mar. 06, 2008
Ronald N. Kalla, Round Rock, TX (US);
Cathy May, Millwood, NY (US);
Balaram Sinharoy, Poughkeepsie, NY (US);
Edward John Silha, Austin, TX (US);
Shih-hsiung S. Tung, Austn, TX (US);
Ronald N. Kalla, Round Rock, TX (US);
Cathy May, Millwood, NY (US);
Balaram Sinharoy, Poughkeepsie, NY (US);
Edward John Silha, Austin, TX (US);
Shih-Hsiung S. Tung, Austn, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method and processor for avoiding check stops in speculative accesses. An execution unit, e.g., load/store unit, may be coupled to a queue configured to store instructions. A register, coupled to the execution unit, may be configured to store a value corresponding to an address in physical memory. When the processor is operating in real mode, the execution unit may retrieve the value stored in the register. Upon the execution unit receiving a speculative instruction, e.g., speculative load instruction, from the queue, a determination may be made as to whether the address of the speculative instruction is at or below the retrieved value. If the address of the speculative instruction is at or below this value, then the execution unit may safely speculatively execute this instruction while avoiding a check stop since all the addresses at or below this value are known to exist in physical memory.