High-speed uplink packet access (hsupa) cipher multiplexing engine

Abstract

A combined data packing, cipher and multiplexing engine operable to support high speed uplink packet access (HS-UPA) within user equipment (UE) is provided. This combined cipher multiplexing engine includes a master port, a radio link control (RLC) data packer, and a cipher multiplexing processing module. The master port couples to an advanced microprocessor bus architecture (AMBA) high speed buss (AHB) on which control information for the combined cipher and multiplexing engine is provided. The RLC couples to the master port and receives RLC service data units (SDUs) from the AHB. Then the RLC data packer may concatenate or segment RLC SDUs into RLC packet data units (PDUs) which are stored for use by a cipher multiplexing processing module. The cipher multiplexing processing module retrieves the RLC PDU from the RLC PDU buffer and ciphers to produce ciphered data, if cipher is enabled and multiplexes the ciphered/non-ciphered data together with the RLC header, MAC-es header, MAC-e header and enters the multiplexed results to a hybrid automatic repeat request (HARQ) buffer. A protocol stack executed within the UE activates and provides an array on the formation of the RLC PDU, RLC header information to the combined cipher and multiplexing engine for RLC PDU ciphering and medium access control (MAC) multiplexing of the enhanced data transport channel (E-DCH).