The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2011

Filed:

Jan. 22, 2009
Applicants:

Hideaki Hasegawa, Ibaraki, JP;

Koji Higuchi, Ibaraki, JP;

Atsushi Hirama, Chiba, JP;

Koji Yamazaki, Ibaraki, JP;

Inventors:

Hideaki Hasegawa, Ibaraki, JP;

Koji Higuchi, Ibaraki, JP;

Atsushi Hirama, Chiba, JP;

Koji Yamazaki, Ibaraki, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a load capacity driving circuit that is inexpensive and has a high driving capability. When an input signal changes to low potential, gate voltage of an output stage of an amplifying circuit increases, an NMOS transistor MNO turns on, and an NMOS transistor MNincreases potential of a node NGAT. Due thereto, an NMOS transistor MNOalso turns on, and a load capacity is discharged via the NMOS transistor MNO and the NMOS transistor MNO. Further, when the input signal changes to high potential, gate voltage of the output stage of the amplifying circuit decreases, a PMOS transistor MPO turns on, and a PMOS transistor MPdecreases potential of a node PGAT. Due thereto, a PMOS transistor MPOalso turns on, and the load capacity is charged from a constant voltage source via the PMOS transistor MPO and the PMOS transistor MPO


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