The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2011

Filed:

Dec. 05, 2006
Applicants:

Joseph E. Peck, Hutto, TX (US);

Hugo A. Andrade, Austin, TX (US);

Inventors:

Joseph E. Peck, Hutto, TX (US);

Hugo A. Andrade, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2006.01); G06F 3/00 (2006.01); G06F 3/033 (2006.01);
U.S. Cl.
CPC ...
Abstract

System and method for implementing a design flow for a programmable hardware element (PHE) coupled to a processor. A graphical program (GP) that specifies performance criteria is received. The GP is mapped for deployment, with a first portion targeted for execution by the processor, and a second portion targeted for implementation in the PHE. A determination is made as to whether the graphical program meets the performance criteria. If not, the GP is remapped for deployment, including identifying and specifying the sub-portion for implementation in the PHE, thereby moving the sub-portion from the first portion to the second portion, and/or identifying and specifying the sub-portion for execution on the processor, thereby moving the sub-portion from the second portion to the first portion. The determining and remapping are repeated until the performance criteria are met. The first and second portions are deployed to the processor and the PHE, respectively.


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