The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 2011
Filed:
May. 05, 2008
Justin P. Bandholz, Cary, NC (US);
Zachary B. Durham, Asheboro, NC (US);
Clifton E. Kerr, Durham, NC (US);
Joseph E. Maxwell, Cary, NC (US);
Kevin M. Reinberg, Chapel Hill, NC (US);
Kevin S. D. Vernon, Durham, NC (US);
Philip L. Weinstein, Apex, NC (US);
Christopher C. West, Raleigh, NC (US);
Justin P. Bandholz, Cary, NC (US);
Zachary B. Durham, Asheboro, NC (US);
Clifton E. Kerr, Durham, NC (US);
Joseph E. Maxwell, Cary, NC (US);
Kevin M. Reinberg, Chapel Hill, NC (US);
Kevin S. D. Vernon, Durham, NC (US);
Philip L. Weinstein, Apex, NC (US);
Christopher C. West, Raleigh, NC (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a memory switching data processing system is provided. The memory switching data processing system includes one or more central processing units ('CPUs'); random access memory organized in at least two banks of memory modules; one or more memory buses providing communications paths for data among the CPUs and the memory modules; and a flexibly configurable memory bus switch comprising a first configuration adapting the first CPU to a first bank of memory modules and a second CPU to a second bank of memory modules and a second configuration adapting the first CPU to both the first bank of memory modules and the second bank of memory modules.