The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 2011
Filed:
Aug. 14, 2008
Takahiro Suzuki, Tokai, JP;
Yasuo Notohara, Hitachiota, JP;
Tsunehiro Endo, Hitachiota, JP;
Yuji Mori, Zama, JP;
Takahiro Suzuki, Tokai, JP;
Yasuo Notohara, Hitachiota, JP;
Tsunehiro Endo, Hitachiota, JP;
Yuji Mori, Zama, JP;
Renesas Electronics Corporation, Kawasaki-shi, JP;
Abstract
Provided is a control technique of a PWM conversion type power converter capable of compensating for a voltage error due to voltage drop mainly at a switching element and managing a switching time of a PWM signal at the same time, and capable of suppressing increase/decrease of software operation load and addition of a hardware circuit to the minimum. A semiconductor integrated circuit having a PWM signal generating unit which generates a PWM signal is provided with a PWM timer unit including a counter counting a pulse width of a pulse signal inputted from the outside with delay from a PWM signal, a register loading a counter value of the counter in synchronization with the PWM signal, and an A/D converting unit converting an analog signal serving as a source signal of the pulse signal inputted from the outside to a digital signal.