The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2011

Filed:

Feb. 19, 2010
Applicants:

Sergey Shumarayev, Los Altos Hills, CA (US);

Thungoc M. Tran, San Jose, CA (US);

Simardeep Maangat, Sunnyvale, CA (US);

Wilson Wong, San Francisco, CA (US);

Inventors:

Sergey Shumarayev, Los Altos Hills, CA (US);

Thungoc M. Tran, San Jose, CA (US);

Simardeep Maangat, Sunnyvale, CA (US);

Wilson Wong, San Francisco, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/173 (2006.01);
U.S. Cl.
CPC ...
Abstract

High-speed serial interface ('HSSI') transceiver circuitry (e.g., on a programmable logic device ('PLD') integrated circuit) includes input buffer circuitry with adaptive equalization capability. The transceiver circuitry also includes an output driver, which may include pre-emphasis capability (preferably controllably settable). Selectively usable loop-back circuitry is provided for allowing the output signal of the input buffer to be applied substantially directly to the output driver. The loop-back circuitry may include a loop-back driver, which may be turned on substantially only when needed for loop-back operations.


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