The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2011

Filed:

Oct. 15, 2009
Applicants:

Peng Yi Wu, Taichung, TW;

Shih Cheng Huang, Hsinchu, TW;

Po Min Tu, Chiayi County, TW;

Ying Chao Yeh, Taipei County, TW;

Wen Yu Lin, Taichung County, TW;

Shih Hsiung Chan, Hsinchu, TW;

Inventors:

Peng Yi Wu, Taichung, TW;

Shih Cheng Huang, Hsinchu, TW;

Po Min Tu, Chiayi County, TW;

Ying Chao Yeh, Taipei County, TW;

Wen Yu Lin, Taichung County, TW;

Shih Hsiung Chan, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/66 (2006.01); H01L 21/20 (2006.01); H01L 21/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a method for blocking the dislocation propagation of a semiconductor. A semiconductor layer is formed by epitaxial process on a substrate. A plurality of recesses is formed on the semiconductor layer by etching fragile locations of the semiconductor layer where dislocation occurs. Thereafter, a blocking layer is formed on each of the plurality of recesses. The aforesaid semiconductor layer undergoes epitaxial process again on the aforesaid semiconductor layer, and laterally overgrows to redirect the dislocation defects.


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