The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 10, 2011
Filed:
May. 09, 2007
Lewis Adams, Carmel, CA (US);
Lewis Adams, Carmel, CA (US);
Gainspan, Inc., Sunnyvale, CA (US);
Abstract
Optimum power management of system on chip based on tiered states of operation is disclosed. In one embodiment, a system on chip includes a hardware module including one or more of a microcontroller, a microprocessor, a DSP core, a memory, a timing source, a peripheral, and an external interface to have a real time counter module of the peripheral isolated from a rest of the hardware module using a plurality of voltage level shifting cells and/or a plurality of voltage island cells. Also, the system on chip includes a software module associated with the real time counter module to generate one or more control signals to one or more devices external to the system on chip during a sleep mode of the system on chip.