The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2011

Filed:

Oct. 29, 2007
Applicant:

Takashi Oshikiri, Osaka, JP;

Inventor:

Takashi Oshikiri, Osaka, JP;

Assignee:

MegaChips Corporation, Osaka-shi, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory () comprises a controller () and a memory array (). The memory array () is controlled for each of block areas (. . . ). The information processing apparatus () can not generate a data erase command for each block area (). A data erase command () for a specified block area 'G' is encoded and stored in a block area 'A'. When a request for data erasing is issued, a CPU () of the information processing apparatus () reads an erase command () out from the semiconductor memory () and outputs the erase command () to the controller (). The controller () decodes the erase command () and performs a data erasing process for the block area “G”.


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