The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2011

Filed:

Mar. 19, 2008
Applicants:

Chia-jen Chang, Houston, TX (US);

Phat Truong, Houston, TX (US);

Inventors:

Chia-Jen Chang, Houston, TX (US);

Phat Truong, Houston, TX (US);

Assignee:

Nanya Technology Corp., Kueishan, Tao-Yuan Hsien, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/00 (2006.01); G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for dynamically enabling address receivers in a synchronous memory array includes: controlling all address receivers to initially be in an off state; generating a command signal and generating an address signal; delaying the address signal so there is a latency between the command signal and the address signal; and selectively turning on an address receiver corresponding to the address signal when the command signal is received by the synchronous memory array.


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Chang, Chia-Jen. (2011). Low power synchronous memory command address scheme (U.S. Patent No. 7940543). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7940543

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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