The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 10, 2011
Filed:
Sep. 27, 2007
Applicants:
Michael R. May, Austin, TX (US);
Raymond L. Vargas, Austin, TX (US);
Inventors:
Michael R. May, Austin, TX (US);
Raymond L. Vargas, Austin, TX (US);
Assignee:
Freescale Semiconductor, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 21/10 (2006.01);
U.S. Cl.
CPC ...
Abstract
A clock system includes a phase locked loop, a phase divider, and a control module. The phase locked loop (PLL) produces a plurality of phase-offset output oscillations. The phase divider generates a clock signal from one or more of the plurality of phase-offset output oscillations based on a phase divider control signal. The control module generates the phase divider control signal based on a desired setting for the clock signal.