The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 10, 2011
Filed:
Jul. 30, 2008
Daisuke Nomasaki, Osaka, JP;
Koji Oka, Osaka, JP;
Daisuke Nomasaki, Osaka, JP;
Koji Oka, Osaka, JP;
Panasonic Corporation, Osaka, JP;
Abstract
A differential voltage interconnect (W) electrically connects the gate electrode of a transistor to be used among differential transistors (T, T, . . . ) to an input node receiving an input voltage (Vinn), and a differential voltage interconnect (W) electrically connects the gate electrode of a transistor to be used among differential transistors (T, T, . . . ) to an input node receiving an input voltage (Vinp). A bias voltage interconnect (W) electrically connects the gate electrode of a transistor to be used among current source transistors (T, T, . . . ) to a bias node receiving a bias voltage (VBN), and a bias voltage interconnect (W) electrically connects the gate electrodes of transistors to be used among load transistors (T, T, . . . , T, T, . . . ) to a bias node receiving a bias voltage (VBP).