The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2011

Filed:

Mar. 02, 2009
Applicants:

Srikanth Govindarajulu, Colorado Springs, CO (US);

Andrew Joseph Gardner, Boulder, CO (US);

Robert C. Chiacchia, Colorado Springs, CO (US);

Inventors:

Srikanth Govindarajulu, Colorado Springs, CO (US);

Andrew Joseph Gardner, Boulder, CO (US);

Robert C. Chiacchia, Colorado Springs, CO (US);

Assignee:

Linear Technology Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and apparatus for sampling an input voltage and apparatus incorporating the same are disclosed. An input voltage sampling apparatus includes a voltage sampling circuit coupled to the input voltage and configured to produce a sampled input voltage at an output terminal, and a voltage charging circuit coupled to the voltage sampling device and producing a first charged voltage on a first charged voltage output terminal and a second charged voltage on a second charged voltage output terminal. A voltage charging enabling circuit is coupled to the voltage charging circuit, the voltage sampling device via the first connection, and a power supply voltage. Further, the input voltage sampling apparatus includes a control circuit coupled to the voltage sampling circuit, the voltage charging circuit, and the power supply voltage, ground, third and fourth pulse signals. The first and third pulse signals are non-overlapping with the second and fourth pulse signals. The first pulse signal is delayed on the rising edge of the third pulse signal and the second pulse signal is delayed on the rising edge of the fourth pulse signal. The voltage sampling apparatus is capable of sampling an input voltage that is higher than the power supply voltage.


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