The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2011

Filed:

Apr. 29, 2009
Applicants:

Paul S. Andry, Yorktown Heights, NY (US);

Stephen L. Buchwalter, Anthem, AZ (US);

George A. Katopis, Poughkeepsie, NY (US);

John U. Knickerbocker, Yorktown Heights, NY (US);

Stelios G. Tsapepas, Yorktown Heights, NY (US);

Bucknell C. Webb, Yorktown Heights, NY (US);

Inventors:

Paul S. Andry, Yorktown Heights, NY (US);

Stephen L. Buchwalter, Anthem, AZ (US);

George A. Katopis, Poughkeepsie, NY (US);

John U. Knickerbocker, Yorktown Heights, NY (US);

Stelios G. Tsapepas, Yorktown Heights, NY (US);

Bucknell C. Webb, Yorktown Heights, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01);
U.S. Cl.
CPC ...
Abstract

An electronic device assembly is provided which includes a substrate, an interposer and an integrated circuit chip. The substrate is fabricated of a first material having a first thermal expansivity, and the interposer and integrated circuit chip are fabricated of a second material having a second thermal expansivity. The second thermal expansivity is different from the first thermal expansivity so that there is a coefficient of thermal expansion mismatch between the substrate and the interposer or chip. The interposer is coupled to the substrate via a first plurality of electrical contacts and an underfill adhesive at least partially surrounding the electrical contacts to bond the interposer to the substrate and thereby reduce strain on the first plurality of electrical contacts. The integrated circuit chip is coupled to the interposer via a second plurality of electrical contacts only, without use of an adhesive surrounding the second plurality of electrical contacts.


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