The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7935604 B1

PDF
Full Text
Expired
Date of Patent:
May. 03, 2011

Filed:

Feb. 11, 2008
Applicants:

James William Adkisson, Jericho, VT (US);

Jeffrey Peter Gambino, Westford, VT (US);

Robert Kenneth Leidy, Burlington, VT (US);

Walter Victor Lepuschenko, Fairfax, VT (US);

David Alan Meatyard, Bolton, VT (US);

Stephen A. Mongeon, Essex Junction, VT (US);

Richard John Rassel, Colchester, VT (US);

Inventors:

James William Adkisson, Jericho, VT (US);

Jeffrey Peter Gambino, Westford, VT (US);

Robert Kenneth Leidy, Burlington, VT (US);

Walter Victor Lepuschenko, Fairfax, VT (US);

David Alan Meatyard, Bolton, VT (US);

Stephen A. Mongeon, Essex Junction, VT (US);

Richard John Rassel, Colchester, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of forming a small geometry feature. The method includes forming a source layer on a top surface of a substrate; forming a mandrel on a top surface of the source layer, the mandrel having a sidewall; sputtering material from the source layer onto the sidewall of the mandrel to form a sidewall layer on the sidewall of the mandrel; and removing the mandrel. Also methods to forming wires and field effect transistors of integrated circuits.


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