The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2011
Filed:
Sep. 28, 2007
Steven D. Sardella, Hudson, MA (US);
Stephen Strickland, Foxboro, MA (US);
James C. Tryhubczak, Cumberland, RI (US);
John F. Phinney, Westford, MA (US);
Steven D. Sardella, Hudson, MA (US);
Stephen Strickland, Foxboro, MA (US);
James C. Tryhubczak, Cumberland, RI (US);
John F. Phinney, Westford, MA (US);
EMC Corporation, Hopkinton, MA (US);
Abstract
Described are electronics systems and methods for distributing a limited number of lanes of a PCI Express-based processor (CPU) module among a plurality of PCI Express-based I/O modules with which the CPU module is in communication. The CPU module receives a code from each I/O module over a sideband interface between that I/O module and the CPU module. The coded signal represents a link-width capability of the I/O module. The CPU module is configured to allocate a link width to each I/O module based on the fixed number of lanes and the link-width capability as represented by the coded signal received from that I/O module. The link between CPU module and each I/O module is trained in accordance with the link width allocated to that I/O module.