The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2011
Filed:
Sep. 27, 2006
Yakov I. Royter, Santa Monica, CA (US);
Rajesh D. Rajavel, Oak Park, CA (US);
Stanislav I. Ionov, Calabasas, CA (US);
Irina Ionova, Legal Representative, Calabasas, CA (US);
Sophi Ionova, Legal Representative, Calabasas, CA (US);
Yakov I. Royter, Santa Monica, CA (US);
Rajesh D. Rajavel, Oak Park, CA (US);
Stanislav I. Ionov, Calabasas, CA (US);
Irina Ionova, legal representative, Calabasas, CA (US);
Sophi Ionova, legal representative, Calabasas, CA (US);
HRL Laboratories, LLC, Malibu, CA (US);
Abstract
Fabrication of a photonic integrated circuit (PIC) including active elements such as a semiconductor optical amplifier (SOA) and passive elements such as a floating rib waveguide. Selective area doping through ion implantation or thermal diffusion before semiconductor epitaxial growth is used in order to define the contact and lateral current transport layers for each active device, while leaving areas corresponding to the passive devices undoped. InP wafers are used as the substrate which may be selectively doped with silicon.