The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2011
Filed:
Oct. 30, 2003
Ki-hwan Park, Suwon, KR;
Tae-joon Kim, Suwon, KR;
Young-choul Kook, Suwon, KR;
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Abstract
A method of and system for cleaning semiconductor wafers minimizes the exposure of the wafers to the air by washing, rinsing and drying the wafers in one cleaning chamber. The system includes a wafer support by which a plurality of wafers can be supported in the cleaning chamber as oriented vertically and spaced from each other, and tubular de-ionized water supply nozzles extending longitudinally in the direction in which the wafers are spaced from each other as disposed to the sides of the wafers. Each de-ionized water supply nozzle has an inner nozzle passageway, and a plurality of sets of nozzle holes extending radially through the main body of the nozzle from the inner nozzle passageway. Each such set of nozzle holes subtends an angle of 80˜100° in a vertical plane and is directed towards a surface of a respective wafer W. During a primary rinse procedure, the de-ionized water is supplied to the de-ionized water spray nozzles, and the liquid in the cleaning chamber is simultaneously discharged from a lower part of the chamber and by being allowed to overflow the chamber. The supplying of the de-ionized water to the de-ionized water spray nozzles and the discharging of the cleaning chamber are carried out in proportions that minimize differences in the etching rate of a wafer across the surface thereof.