The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2011
Filed:
Feb. 19, 2009
David J. Husak, Windham, NH (US);
Matthew S. Melton, Boulder, CO (US);
David F. Barton, Longmont, CO (US);
David Nuechterlein, Longmont, CO (US);
Syed I. Shah, North Andover, MA (US);
Jon L. Fluker, Lafayette, CO (US);
David J. Husak, Windham, NH (US);
Matthew S. Melton, Boulder, CO (US);
David F. Barton, Longmont, CO (US);
David Nuechterlein, Longmont, CO (US);
Syed I. Shah, North Andover, MA (US);
Jon L. Fluker, Lafayette, CO (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
Techniques for performing user-configurable traffic management functions on streams of packets. The functions include multicasting, discard, scheduling, including shaping, and segmentation and reassembly. In the techniques, the functions are not performed directly on the packets of the stream, but instead on descriptors that represent stored packets. Output of descriptors from all traffic queues, including discard traffic queues, is scheduled. Scheduling is done using a hierarchy of schedulers. The form of the hierarchy and the scheduling algorithms used by the schedulers in the hierarchy are both user configurable. As disclosed, the techniques are implemented in a traffic management coprocessor integrated circuit. The traffic manager coprocessor is used with a digital communications processor integrated circuit that performs switching functions. The buffers for the packets are in the digital communications processor. Also disclosed are a modified partial packet discard algorithm and a frame based deficit round robin scheduling algorithm.