The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 19, 2011

Filed:

Aug. 28, 2007
Applicants:

Yu-ju Kuo, Hsin-Chu, TW;

Ming-sheng Lai, Hsin-Chu, TW;

Kuo-hsing Cheng, Hsin-Chu, TW;

Chih-yuan Chien, Hsin-Chu, TW;

Inventors:

Yu-ju Kuo, Hsin-Chu, TW;

Ming-sheng Lai, Hsin-Chu, TW;

Kuo-hsing Cheng, Hsin-Chu, TW;

Chih-yuan Chien, Hsin-Chu, TW;

Assignee:

AU Optronics Corp., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

A signal-driving system for constructing gate signals of liquid crystal display (LCD), includes a plural stage of cascaded shift register units. Each stage of shift register unit includes a first pull-up switch unit, which is turned on for outputting a gate pulse on an output of this stage, based on either the first clock signal or the second clock signal; a pull-up driving unit, which is used for providing a driving pulse via a node for driving the first pull-up switch unit; a first pull-down switch unit, which is turned on to connect the output to a low-level voltage source; a second pull-down switch unit, which is turned on to connect said node to the low-level voltage source; a carry buffer unit, which is used for providing a control pulse on the second pull-down switch unit of previous stage, based on either the first clock signal or the second clock signal, and thereby ensuring operation of each stage independent of gate pulse signals outputted from the other stages.


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