The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2011
Filed:
Jan. 14, 2010
Applicant:
Kwang Jun Cho, Seoul, KR;
Inventor:
Kwang Jun Cho, Seoul, KR;
Assignee:
Hynix Semiconductor Inc., Icheon-si, KR;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/017 (2006.01);
U.S. Cl.
CPC ...
Abstract
A clock buffer circuit of a semiconductor device is disclosed which receives an external clock signal and generates an internal clock signal with no duty distortion. The clock buffer circuit includes a first clock buffer for receiving and buffering a normal-phase clock signal, a second clock buffer for receiving and buffering a reverse-phase clock signal, and an internal clock generator for generating an internal clock signal in response to output signals from the first and second clock buffers.