The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2011
Filed:
May. 05, 2008
Hee-chul Jeon, Suwon-si, KR;
Chul-kyu Kang, Suwon-si, KR;
Woo-sik Jun, Suwon-si, KR;
Jong-hyun Choi, Suwon-si, KR;
Hee-Chul Jeon, Suwon-si, KR;
Chul-Kyu Kang, Suwon-si, KR;
Woo-Sik Jun, Suwon-si, KR;
Jong-Hyun Choi, Suwon-si, KR;
Samsung Mobile Display Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Abstract
A thin film transistor (TFT) may include a substrate, a gate electrode on the substrate, a gate insulating layer on the gate electrode, and a semiconductor layer on the gate insulating layer. The semiconductor layer may include a top surface, a channel area aligned in a vertical direction with the gate electrode, a plurality of doped areas proximate to the channel area, and a plurality of non-doped areas. Source and drain electrodes may be on the top surface of the semiconductor layer aligned above respective ones of the plurality of non-doped areas of the semiconductor layer. A planarization layer may be on the gate insulating layer, the source and drain electrodes and the semiconductor layer channel area, and may include a plurality of openings respectively exposing the plurality of doped areas of the semiconductor layer and a portion of the source electrode and the drain electrode.