The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2011
Filed:
Mar. 27, 2006
Laurent Guillot, Seysses, FR;
Kamel Abouda, Tournefeuille, FR;
Pierre Turpin, Toulouse, FR;
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A clock failure detection circuit comprises clock failure detection logic having a clock input providing an input clock signal, a counter and a reference clock input providing a reference clock signal to the counter for counting a number of reference clock cycles. The counter comprises a reset input arranged to receive successive reset pulses generated by at least one clock edge of the input clock signal to reset a counter value of the counter. The counter value before reset is used to identify a clock frequency error. A method of detecting a clock failure is also described. By using a counter value based on the reference clock cycles, and a reset trigger based on a clock edge of the input signal, it is possible to identify a clock frequency error in a much shorter time.