The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2011
Filed:
Oct. 14, 2005
Chih-feng Huang, Jhubei, TW;
Tuo-hsin Chien, Tucheng, TW;
Jenn-yu Lin, Sindian, TW;
Ta-yung Yang, Milpitas, CA (US);
Chih-Feng Huang, Jhubei, TW;
Tuo-Hsin Chien, Tucheng, TW;
Jenn-Yu Lin, Sindian, TW;
Ta-Yung Yang, Milpitas, CA (US);
System General Corp., Taipei Hsien, TW;
Abstract
A MOSFET with an isolation structure is provided. An N-type MOSFET includes a first N-type buried layer and a P-type epitaxial layer disposed in a P-type substrate. A P-type FET includes a second N-type buried layer and the P-type epitaxial layer disposed in the P-type substrate. The first, second N-type buried layers and the P-type epitaxial layer provide isolation between FETs. In addition, a plurality of separated P-type regions disposed in the P-type epitaxial layer further provides an isolation effect. A first gap exists between a first thick field oxide layer and a first P-type region, for raising a breakdown voltage of the N-type FET. A second gap exists between a second thick field oxide layer and a second N-well, for raising a breakdown voltage of the P-type FET.