The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2011
Filed:
Dec. 07, 2006
Applicants:
Gilberto A. Curatola, Korbek-Lo, BE;
Sebastien Nuttinck, Heverlee, BE;
Inventors:
Gilberto A. Curatola, Korbek-Lo, BE;
Sebastien Nuttinck, Heverlee, BE;
Assignee:
NXP B.V., Eindhoven, NL;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/331 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method of making a FET includes forming a gate structure (), then etching cavities on either side. A SiGe layer () is then deposited on the substrate () in the cavities, followed by an Si layer (). A selective etch is then carried out to etch away the SiGe () except for a part of the layer under the gate structure (), and oxide () is grown to fill the resulting gap. SiGe source and drains are then deposited in the cavities. The oxide () can reduce junction leakage current.