The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2011

Filed:

Dec. 18, 2006
Applicants:

Jan Sonsky, Leuven, BE;

Wibo D. Van Noort, Wappingers Falls, NY (US);

Inventors:

Jan Sonsky, Leuven, BE;

Wibo D. Van Noort, Wappingers Falls, NY (US);

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 21/302 (2006.01); H01L 21/461 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a semiconductor device wherein a laminate structure comprising a sacrificial layer is sandwiched between two etch stop layers () and which separates a semiconductor membrane () from a bulk substrate () is used to provide an underetched structure. Access trenches () and support trenches () are formed in the layered structure through the thickness of the semiconductor layer () and through the upper etch stop layer (). The support trenches extend deeper through the sacrificial layer () and the lower etch stop layer and are filled. The sacrificial layer is exposed and etched away selectively to the etch stop layers to form a cavity () and realise a semiconductor membrane which is attached to the bulk substrate via a vertical support structure comprising the filled support trenches.


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