The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7921404 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 05, 2011

Filed:

Dec. 11, 2007
Applicants:

Anil Bindu Lingambudi, Karnataka, IN;

Ankur Kanu Patel, Rochester, MN (US);

Saravanan Sethuraman, Bangalore, IN;

Diyanesh Vidyapoornachary Babu Chinnakkonda, Bangalore, IN;

Inventors:

Anil Bindu Lingambudi, Karnataka, IN;

Ankur Kanu Patel, Rochester, MN (US);

Saravanan Sethuraman, Bangalore, IN;

Diyanesh Vidyapoornachary Babu Chinnakkonda, Bangalore, IN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method is disclosed for electronically processing constraints rules defined in a previously developed first PCB design having a first constraints output file, to facilitate the development of a second PCB design having a second constraints output file. The second design has substantially identical topology to the first design and the second constraints output file comprises constraints for signals with identical attributes. The method includes several steps. Firstly, the board file of the first design is compared with the net list file of the second design to identify respective differences between the designs. On the basis of the established differences, a file attributes change report is generated. At least some data from the file attributes change report is stored into an attributes change file. Finally, the method includes the step of processing the first design constraints output file, the second design constraints output file, and the attribute change file to map constraints associated with changed attributes, thus defining a revised constraints output file for the second design. The revised second constraints output file comprises constraints for at least some signals with changed attributes.


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