The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2011

Filed:

Sep. 17, 2009
Applicants:

James Edward Sullivan, Jr., Cary, NC (US);

Jaya Prakash Subramaniam Ganasan, Youngsville, NC (US);

Richard Gerard Hofmann, Cary, NC (US);

Inventors:

James Edward Sullivan, Jr., Cary, NC (US);

Jaya Prakash Subramaniam Ganasan, Youngsville, NC (US);

Richard Gerard Hofmann, Cary, NC (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The disclosure is directed to a weakly-ordered processing system and method of executing memory barriers in weakly-ordered processing system. The processing system includes memory and a master device configured to issue memory access requests, including memory barriers, to the memory. The processing system also includes a slave device configured to provide the master device access to the memory, the slave device being further configured to produce a signal indicating that an ordering constraint imposed by a memory barrier issued by the master device will be enforced, the signal being produced before the execution of all memory access requests issued by the master device to the memory before the memory barrier.


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