The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2011

Filed:

Jul. 06, 2007
Applicants:

Takanori Watanabe, Yamato, JP;

Tetsuya Itano, Zama, JP;

Hidekazu Takahashi, Zama, JP;

Shunsuke Takimoto, Machida, JP;

Kotaro Abukawa, Hiratsuka, JP;

Hiroaki Naruse, Yokohama, JP;

Shigeru Nishimura, Ebina, JP;

Masatsugu Itahashi, Atsugi, JP;

Inventors:

Takanori Watanabe, Yamato, JP;

Tetsuya Itano, Zama, JP;

Hidekazu Takahashi, Zama, JP;

Shunsuke Takimoto, Machida, JP;

Kotaro Abukawa, Hiratsuka, JP;

Hiroaki Naruse, Yokohama, JP;

Shigeru Nishimura, Ebina, JP;

Masatsugu Itahashi, Atsugi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/335 (2006.01);
U.S. Cl.
CPC ...
Abstract

A photoelectric conversion device includes a photoelectric conversion region having a plurality of photoelectric conversion elements and a first MOS transistor configured to read a signal in response to an electric charge of each photoelectric conversion element; and a peripheral circuit region having a second MOS transistor configured to drive the first MOS transistor and/or amplify the signal read from the photoelectric conversion region, the photoelectric conversion region and the peripheral circuit region being located on the same semiconductor substrate, wherein an impurity concentration in a drain of the first MOS transistor is lower than an impurity concentration in a drain of the second MOS transistor.


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