The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 05, 2011
Filed:
Aug. 26, 2009
Hirotaka Kawai, Hamamatsu, JP;
Nobuaki Tsuji, Hamamatsu, JP;
Morito Morishima, Fukuroi, JP;
Yohei Otani, Hamamatsu, JP;
Hirotaka Kawai, Hamamatsu, JP;
Nobuaki Tsuji, Hamamatsu, JP;
Morito Morishima, Fukuroi, JP;
Yohei Otani, Hamamatsu, JP;
Yamaha Corporation, Hamamatsu-shi, JP;
Abstract
The present invention provides a D/A converter circuit which enables D/A conversion with a high precision and can prevent occurrence of a limit cycle component in the case where an input signal is low, and can also prevent the effect of dither signal from occurring in an analog signal which is a D/A conversion result. A dither signal generation sectionoutputs a dither signal (DITHER) which is an alternating current signal and a reversal dither signal (DITHER_N) inverted from the dither signal. A DEM decoderprocesses an input digital signal including a component of the dither signal (DITHER), and outputs a plurality of lines of time-series digital signals having a density of '1' or '0' conforming to the input digital signal to be processed. An analog addition sectionconverts a plurality of lines of time-series digital signals and the reversal dither signal (DITHER_N) into an analog signal respectively and adds them, and outputs an analog signal which is a D/A conversion result.