The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 05, 2011
Filed:
Dec. 20, 2007
James Karp, Saratoga, CA (US);
Steven P. Young, Boulder, CO (US);
Bernard J. New, Carmel Valley, CA (US);
Scott S. Nance, Grass Valley, CA (US);
Patrick J. Crotty, San Jose, CA (US);
James Karp, Saratoga, CA (US);
Steven P. Young, Boulder, CO (US);
Bernard J. New, Carmel Valley, CA (US);
Scott S. Nance, Grass Valley, CA (US);
Patrick J. Crotty, San Jose, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
Formation of a hybrid integrated circuit device is described. A design for the integrated circuit is obtained and separated into at least two portions responsive to component sizes. A first die is formed for a first portion of the hybrid integrated circuit device using at least in part a first minimum dimension lithography. A second die is formed for a second portion of the device using at least in part a second minimum dimension lithography, where the second die has the second minimum dimension lithography as a smallest lithography used for the forming of the second die. The first die and the second die are attached to one another via coupling interconnects respectively thereof to provide the hybrid integrated circuit device.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile