The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2011

Filed:

Sep. 20, 2006
Applicants:

Volkan Ozguz, Aliso Viejo, CA (US);

Jonathan Stern, Laguna Beach, CA (US);

Inventors:

Volkan Ozguz, Aliso Viejo, CA (US);

Jonathan Stern, Laguna Beach, CA (US);

Assignee:

Aprolase Development Co., LLC, Wilmington, DE (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A stackable tier structure comprising one or more integrated circuit die and one or more feedthrough structures is disclosed. The I/O pads of the integrated circuit die are electrically rerouted using conductive traces from the first side of the tier structure to a feedthrough structure comprising one ore more conductive structures. The conductive structures electrically route the integrated die pads to predetermined locations on the second side of the tier structure. The predetermined locations, such as exposed conductive pads or conductive posts, in turn, may be interconnected to a second tier structure or other circuitry to permit the fabrication of a three-dimensional microelectronic module comprising one or more stacked tiers.


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