The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 29, 2011

Filed:

Jun. 30, 2008
Applicants:

Stephen P. Ayotte, Bristol, VT (US);

Jeffrey D. Gilbert, Fairfax, VT (US);

David J. Hill, Richmond, VT (US);

Ronald L. Mendelson, Richmond, VT (US);

Timothy M. Sullivan, Essex, VT (US);

Inventors:

Stephen P. Ayotte, Bristol, VT (US);

Jeffrey D. Gilbert, Fairfax, VT (US);

David J. Hill, Richmond, VT (US);

Ronald L. Mendelson, Richmond, VT (US);

Timothy M. Sullivan, Essex, VT (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods for making, and structures so made for producing integrated circuit (IC) chip packages without forming micro solder balls. In one embodiment, a method may include placing a solid grid made from an organic material between the IC chip and the substrate. The grid provides a physical barrier between each of a plurality of Controlled Collapse Chip Connections, and thereby prevents the formation of micro solder balls between them, thus improving chip performance and reliability.


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