The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7915120 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 29, 2011

Filed:

Apr. 29, 2009
Applicants:

Jung-woo Park, Icheon-si, KR;

Jin-ki Jung, Icheon-si, KR;

Kwon Hong, Icheon-si, KR;

Ki-seon Park, Icheon-si, KR;

Inventors:

Jung-Woo Park, Icheon-si, KR;

Jin-Ki Jung, Icheon-si, KR;

Kwon Hong, Icheon-si, KR;

Ki-Seon Park, Icheon-si, KR;

Assignee:

Hynix Semiconductor Inc., Icheon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a method of fabricating a non-volatile semiconductor device. The method includes: forming a first hard mask layer over a substrate; etching the first hard mask layer and the substrate to form a plurality of isolation trenches extending in parallel to one another in a first direction; burying a dielectric layer in the isolation trenches to form a isolation layer; forming a plurality of floating gate mask patterns extending in parallel to one another in a second direction intersecting with the first direction over a resulting structure where the isolation layer is formed; etching the first hard mask layer by using the floating gate mask patterns as an etch barrier to form a plurality of island-shaped floating gate electrode trenches; and burying a conductive layer in the floating gate electrode trenches to form a plurality of island-shaped floating gate electrodes.


Find Patent Forward Citations

Park, Jung-Woo. (2011). Method of fabricating non-volatile memory device (U.S. Patent No. 7915120). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7915120

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…