The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 29, 2011
Filed:
Dec. 17, 2007
Hyoung Soo Ko, Seoul, KR;
Byung Gook Park, Seoul, KR;
Seung Bum Hong, Seongnam-si, KR;
Chul Min Park, Yongin-si, KR;
Woo Young Choi, Yongin-si, KR;
Jong Pil Kim, Yongin-si, KR;
Jae Young Song, Yongin-si, KR;
Sang Wan Kim, Yongin-si, KR;
Hyoung Soo Ko, Seoul, KR;
Byung Gook Park, Seoul, KR;
Seung Bum Hong, Seongnam-si, KR;
Chul Min Park, Yongin-si, KR;
Woo Young Choi, Yongin-si, KR;
Jong Pil Kim, Yongin-si, KR;
Jae Young Song, Yongin-si, KR;
Sang Wan Kim, Yongin-si, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Seoul National University Industry Foundation, Seoul, KR;
Abstract
A method of manufacturing a probe includes: forming a first slant face of the probe through an anisotropic etching process using a first etching mask pattern formed on a silicon substrate; forming a first semiconductor electrode region; forming a second etching mask pattern in an opposite direction of the first etching mask pattern on the silicon substrate; forming a spacer layer on a side wall of the second etching mask pattern; forming a second slant face of the probe; forming a second semiconductor electrode region; forming a silicon oxide layer pattern on the resulting silicon substrate; forming spacer layers on both side walls of the silicon oxide layer pattern; and etching the silicon substrate to a predetermined depth.