The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 29, 2011
Filed:
Mar. 20, 2008
John J. Ellis-monaghan, Grand Isle, VT (US);
Mark D. Jaffe, Shelburne, VT (US);
Sambasivan Narayan, Essex Junction, VT (US);
Anthony J. Perri, Jericho, VT (US);
Richard J. Rassel, Colchester, VT (US);
Tian Xia, Essex Junction, VT (US);
John J. Ellis-Monaghan, Grand Isle, VT (US);
Mark D. Jaffe, Shelburne, VT (US);
Sambasivan Narayan, Essex Junction, VT (US);
Anthony J. Perri, Jericho, VT (US);
Richard J. Rassel, Colchester, VT (US);
Tian Xia, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A semiconductor die including a semiconductor chip and a test structure, located in a scribe area, is designed and manufactured. The test structure includes an array of complementary metal oxide semiconductor (CMOS) image sensors that are of the same type as CMOS image sensors employed in another array in the semiconductor chip and having a larger array size. Such a test structure is provided in a design phase by providing a design structure in which the orientations of the CMOS image sensors match between the two arrays. The test structure provides effective and accurate monitoring of manufacturing processes through in-line testing before a final test on the semiconductor chip.