The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2011

Filed:

Nov. 07, 2006
Applicants:

Alex Nicolescu, Nepean, CA;

Kenji Suzuki, Kanata, CA;

Brian Wall, Stittsville, CA;

Michael Mcdonnell, Osgoode, CA;

Inventors:

Alex Nicolescu, Nepean, CA;

Kenji Suzuki, Kanata, CA;

Brian Wall, Stittsville, CA;

Michael McDonnell, Osgoode, CA;

Assignee:

Cortina Systems, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03D 1/06 (2006.01); H03D 11/04 (2006.01); H03K 5/01 (2006.01); H03K 6/04 (2006.01); H04B 1/10 (2006.01); H04L 1/00 (2006.01); H04L 25/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

A novel method and apparatus is disclosed, that embeds with, or otherwise makes available to an adaptive equalizer, suitable for use in IEEE 1OG-LRM standard compliant receivers, digital logic that monitors some of the Layer 1 and preferably some of the Layer 2 processing that typically occurs after the equalization step during decoding and processing of the record data stream. From this additional logic information, the equalizer is able to make a much more accurate prediction of equalizer convergence by counting processing errors and prove convergence by calculation of BER. The novel method and apparatus are applicable to ASIC embodiments and the complexity of the logic information obtained can be programmably scaled back or enhanced as appropriate in light of the particular communication environment.


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