The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2011
Filed:
Sep. 25, 2007
Applicant:
Kozo Katayama, Tokyo, JP;
Inventor:
Kozo Katayama, Tokyo, JP;
Assignee:
Renesas Electronics Corporation, Kanagawa, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01);
U.S. Cl.
CPC ...
Abstract
A p-type well region is formed at a main surface of a semiconductor substrate. An n-type impurity region is located under the p-type well region. A first insulating layer is formed on the main surface of the semiconductor substrate and on the p-type well region. A charge-storage insulating layer is formed on the first insulating layer. A gate electrode layer is formed on the charge-storage insulating layer. An erase operation is performed by applying a forward bias to the p-type well region and the n-type impurity region to generate hot carriers and inject the hot carriers into the charge-storage insulating layer.